A Secure Design-for-Test Infrastructure for Lifetime Security of SoCs

被引：0

作者：

Backer, Jerry ^{[1
]}

Ali, Sk Subidh ^{[2
]}

Rosenfeld, Kurt ^{[3
]}

Hely, David ^{[4
]}

Sinanoglu, Ozgur ^{[2
]}

Karri, Ramesh ^{[1
]}

机构：

[1] New York Univ, Polytech Sch Engn, Brooklyn, NY 11201 USA

[2] NYUAD, Abu Dhabi, U Arab Emirates

[3] Google Inc, New York, NY USA

[4] Univ Grenoble Alpes, LCIS, F-26000 Valence, France

来源：

2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2015年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Modular design of a system-on-chip (SoC) exposes intellectual property (IP) and SoC assets to attacks in test, debug, and functional modes. We enhance the SoC Design-for-Test (DfT) infrastructure with security countermeasures to thwart these attacks. We first secure IP and SoC assets from attacks in test and debug modes, then reuse the DfT infrastructure to detect attacks in functional mode.

引用

页码：37 / 40

页数：4

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