Parallel implementation of a fast third-order Volterra digital filter

被引：0
|
作者：
Kwan, H
Im, SB
Powers, EJ
Swartzlander, EE
机构：
来源：
ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE | 1997年
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D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper presents the parallel implementation of a fast third-order Volterra digital filtering algorithm. Our platform is an AT&T DSP-3 parallel processor. Speed-up results indicate that our implementation exhibits high performance and suitability for large data sizes. An application to nonlinear communication channel equalization is presented.
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页码：2473 / 2476
页数：4
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