Parallel implementation of a fast third-order Volterra digital filter

被引：2
|
作者：
Kwan, H
Im, S
Powers, EJ
Swartzlander, EE
机构：
[1] Siemens Communicat Devices, Austin, TX 78728 USA
[2] Soong Sil Univ, Dept Informat & Telecommun Engn, Seoul, South Korea
[3] Univ Texas, Dept Elect & Comp Engn, Austin, TX 78712 USA
来源：
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | 1999年 / 21卷 / 02期
关键词：
D O I：
10.1023/A:1008048205488
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents the parallel implementation and performance evaluation of a fast third-order Volterra digital filtering algorithm mapped onto an AT&T DSP-3 parallel processor. Five different implementations are considered. A timing analysis of the parallel implementations is presented. Based on execution time measurement, we determine the important factors affecting the performance of the filtering algorithm. Reservation tables are used to illustrate the different implementations. Speed-up results indicate that the "time-skewing" implementation has the highest throughput. An application to nonlinear communication channel equalization is also presented.
引用
收藏
页码：117 / 130
页数：14
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