Defending cache memory against cold-boot attacks boosted by power or EM radiation analysis

被引:1
|
作者
Neagu, Madalin [1 ]
Manich, Salvador [2 ]
机构
[1] Tech Univ Cluj Napoca, Dept Comp Sci, Cluj Napoca, Romania
[2] Univ Politecn Cataluna, BarcelonaTech, Dept Elect Engn, Barcelona, Spain
来源
MICROELECTRONICS JOURNAL | 2017年 / 62卷
关键词
Data scrambling; Cache memories; Differential power analysis; Side-channel attack; Error correction;
D O I
10.1016/j.mejo.2017.02.010
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Some algorithms running with compromised data select cache memory as a type of secure memory where data is confined and not transferred to main memory. However, cold-boot attacks that target cache memories exploit the data remanence. Thus, a sudden power shutdown may not delete data entirely, giving the opportunity to steal data. The biggest challenge for any technique aiming to secure the cache memory is performance penalty. Techniques based on data scrambling have demonstrated that security can be improved with a limited reduction in performance. However, they still cannot resist side-channel attacks like power or electromagnetic analysis. This paper presents a review of known attacks on memories and countermeasures proposed so far and an improved scrambling technique named random masking interleaved scrambling technique (RM-ISTe). This method is designed to protect the cache memory against cold-boot attacks, even if these are boosted by side channel techniques like power or electromagnetic analysis.
引用
收藏
页码:85 / 98
页数:14
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