Tamper-resistant cryptographic hardware

被引:3
|
作者
Fujino, Takeshi [1 ]
Kubota, Takaya [2 ]
Shiozaki, Mitsuru [2 ]
机构
[1] Ritsumeikan Univ, Dept Sci & Engn, 1-1-1 Nojihigashi, Kusatsu, Shiga 5258577, Japan
[2] Ritsumeikan Univ, Res Org Sci & Engn, 1-1-1 Nojihigashi, Kusatsu, Shiga 5258577, Japan
来源
IEICE ELECTRONICS EXPRESS | 2017年 / 14卷 / 02期
基金
日本科学技术振兴机构;
关键词
security; cryptographic circuit; tamper resistance; side channel attack;
D O I
10.1587/elex.14.20162004
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Cryptosystems are widely used for achieving data confidentiality and authenticated access control. Recent cryptographic algorithms such as AES or RSA are computationally safe in the sense that it is practically impossible to reveal key information from a pair of plain and cipher texts if a key of sufficient length is used. A malicious attacker aims to reveal a key by exploiting implementation flaws in cryptographic modules. Even if there are no flaws in the software, the attacker will try to extract a secret key stored in the security hardware. The side-channel attacks (SCAs) are low cost and powerful against cryptographic hardware. The attacker exploits side-channel information such as power or electro-magnetic emission traces on the cryptographic circuits. In this paper, we will introduce the principle of SCAs and the countermeasures against SCAs.
引用
收藏
页码:1 / 13
页数:13
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