共 50 条
- [1] Thermal measurement for verification of power loss in semiconductor switching devices [J]. PRZEGLAD ELEKTROTECHNICZNY, 2012, 88 (4B): : 163 - 168
- [2] Parasitic Inductance Design Considerations to Suppress Gate Voltage Oscillation of Fast Switching Power Semiconductor Devices [J]. 2018 INTERNATIONAL POWER ELECTRONICS CONFERENCE (IPEC-NIIGATA 2018 -ECCE ASIA), 2018, : 2789 - 2795
- [3] Switching loss analysis and modeling of power semiconductor devices base on an automatic measurement system [J]. 2006 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, VOLS 1-7, 2006, : 853 - +
- [6] A New Calorimetric Method for Switching Loss Measurement of Power Devices [J]. 2024 IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, APEC, 2024, : 1783 - 1789
- [7] Effect of Parasitic Inductance in a Soft-Switching SiC Power Converter [J]. 2018 20TH EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS (EPE'18 ECCE EUROPE), 2018,
- [8] ASYMMETRICAL PARASITIC INDUCTANCE USED TO REDUCE SWITCHING LOSSES IN POWER MODULES [J]. ELECTRONICS WORLD, 2013, 119 (1923): : 32 - 36
- [9] Parasitic extraction and power loss estimation of power devices [J]. JOURNAL OF MECHANICS, 2021, 37 : 134 - 148
- [10] Parasitic extraction and power loss estimation of power devices [J]. Journal of Mechanics, 2021, 37 : 134 - 148