Verification of Analog and Mixed Signal Designs using Online Monitoring

被引:0
|
作者
Wang, Zhiwei [1 ]
Abbasi, Naeem [1 ]
Narayanan, Rajeev [1 ]
Zaki, Mohamed H. [2 ]
Al Sammane, Ghiath [1 ]
Tahar, Sofiene [1 ]
机构
[1] Concordia Univ, Dept ECE, Montreal, PQ, Canada
[2] Univ British Columbia, Dept CS, Vancouver, BC, Canada
关键词
TEMPORAL PROPERTIES; SYSTEMS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Analog and mixed signal (AMS) circuits play an important role in today's System on Chip design. They pose, however, many challenges in the verification of the overall system due to their complex behavior. Among many developed verification techniques, runtime verification has been shown to be effective by experimenting finite executions instead of going through the whole state space. In this paper, we present a methodology for the specification and verification of AMS designs using online monitoring at runtime based on the notion of System of Recurrence Equations (SREs). We implement the proposed methodology in a C language based tool, called C-SRE, and utilize it to verify several properties of a PLL design. We compare our proposed online monitoring techniques with the offline approach. Finally, we apply the proposed methodology to monitor the jitter noise associated with a voltage controlled oscillator.
引用
收藏
页码:72 / +
页数:2
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