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- [31] Wafer edge polishing process for defect reduction during immersion lithography METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XXII, PTS 1 AND 2, 2008, 6922 (1-2):
- [32] Contact lithography defect reduction and monitoring for the 90nm node 2003 IEEE INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING, CONFERENCE PROCEEDINGS, 2003, : 126 - 129
- [34] Computational techniques to incorporate shot count reduction into inverse lithography 2015 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE, 2015,
- [36] An Overview Of Various Leakage Power Reduction Techniques in Deep Submicron Technologies 1ST INTERNATIONAL CONFERENCE ON COMPUTING COMMUNICATION CONTROL AND AUTOMATION ICCUBEA 2015, 2015, : 992 - 998
- [37] Leakage Power Reduction Techniques in Deep Submicron Technologies for VLSI Applications INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY AND SYSTEM DESIGN 2011, 2012, 30 : 1163 - 1170
- [38] A novel approach to signal detection in MIMO systems combining coding and joint detection techniques 2004 INTERNATIONAL CONFERENCE ON COMMUNICATION, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEMS, 2004, : 162 - 166
- [39] A Novel Texture Exemplars Extraction Approach Based on Patches Homogeneity and Defect Detection ADVANCES IN MULTIMEDIA INFORMATION PROCESSING - PCM 2017, PT II, 2018, 10736 : 735 - 744
- [40] A Novel Approach of Standard Data Base Generation for Defect Detection in Bare PCB 2015 INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION & AUTOMATION (ICCCA), 2015, : 11 - 15