Efficient Design of Fault Tolerant Tiles In QCA

被引:0
|
作者
Sen, Bibhash [1 ]
Agarwal, Aman [1 ]
Nath, Rajdeep Kumar [1 ]
Mukherjee, Rijoy [1 ]
Sikdar, Biplab K. [2 ]
机构
[1] Natl Inst Technol, Dept Comp Sci & Engn, Durgapur 713209, WB, India
[2] Indian Inst Engn Sci & Technol, Dept Comp Sci & Technol, Howrah 711103, WB, India
关键词
Quantum-dot cellular automata (QCA); Coupled majority minority gate; Fault tolerant tiles; QCA defects;
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
This work targets to explore the design of fault tolerant Quantum-dot Cellular Automata (QCA) tiles. A fault tolerant tile implementing majority logic (FTM) is realised which achieves 95.5% defect tolerance under single cell deposition. Also, two fault tolerant tiles around coupled majority minority (CMVMIN) are investigated in Quantum-dot cellular automata which realize majority and minority functions simultaneously. The characterization defective behaviour of fault tolerant tiles under cell deposition, cell misplacement and cell misalignment defects have been thoroughly investigated. The proposed fault tolerant tiles are found to be achieved fault tolerance of 88.88% and 88.23%. Efficient synthesis of symmetric functions based on such tile, further, establishes its effectiveness.
引用
收藏
页数:6
相关论文
共 50 条
  • [1] Design of Fault Tolerant Universal Logic in QCA
    Sen, Bibhash
    Mukherjee, Rijoy
    Nath, Rajdeep Kumar
    Sikdar, Biplab K.
    2014 FIFTH INTERNATIONAL SYMPOSIUM ON ELECTRONIC SYSTEM DESIGN (ISED), 2014, : 166 - 170
  • [2] A Fault-Tolerant and Efficient XOR Structure for Modular Design of Complex QCA Circuits
    Poorhosseini, Mehrdad
    Hejazi, Ali Reza
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2018, 27 (07)
  • [3] Design of a practical fault-tolerant adder in QCA
    Kumar, Dharmendra
    Mitra, Debasis
    MICROELECTRONICS JOURNAL, 2016, 53 : 90 - 104
  • [4] Towards the design of hybrid QCA tiles targeting high fault tolerance
    Sen, Bibhash
    Dutta, Manojit
    Mukherjee, Rijoy
    Nath, Rajdeep Kumar
    Sinha, Amar Prakash
    Sikdar, Biplab K.
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2016, 15 (02) : 429 - 445
  • [5] Towards the design of hybrid QCA tiles targeting high fault tolerance
    Bibhash Sen
    Manojit Dutta
    Rijoy Mukherjee
    Rajdeep Kumar Nath
    Amar Prakash Sinha
    Biplab K. Sikdar
    Journal of Computational Electronics, 2016, 15 : 429 - 445
  • [6] Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder
    Roohi, Arman
    DeMara, Ronald F.
    Khoshavi, Navid
    MICROELECTRONICS JOURNAL, 2015, 46 (06) : 531 - 542
  • [7] Fault-tolerant and Area-efficient EXOR Circuit Design using QCA Nanotechnology
    Sharma, Vijay Kumar
    Journal of Engineering Science and Technology Review, 2024, 17 (05) : 24 - 31
  • [8] On fault-tolerant design of Exclusive-OR gates in QCA
    Kumar, Dharmendra
    Mitra, Debasis
    Bhattacharya, Bhargab B.
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2017, 16 (03) : 896 - 906
  • [9] On fault-tolerant design of Exclusive-OR gates in QCA
    Dharmendra Kumar
    Debasis Mitra
    Bhargab B. Bhattacharya
    Journal of Computational Electronics, 2017, 16 : 896 - 906
  • [10] Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA
    Sen, Bibhash
    Dutta, Manojit
    Banik, Debajyoty
    Singh, Dipak K.
    Sikdar, Biplab K.
    2012 INTERNATIONAL SYMPOSIUM ON ELECTRONIC SYSTEM DESIGN (ISED 2012), 2012, : 241 - 245