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- [1] Design of Fault Tolerant Universal Logic in QCA 2014 FIFTH INTERNATIONAL SYMPOSIUM ON ELECTRONIC SYSTEM DESIGN (ISED), 2014, : 166 - 170
- [5] Towards the design of hybrid QCA tiles targeting high fault tolerance Journal of Computational Electronics, 2016, 15 : 429 - 445
- [9] On fault-tolerant design of Exclusive-OR gates in QCA Journal of Computational Electronics, 2017, 16 : 896 - 906
- [10] Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA 2012 INTERNATIONAL SYMPOSIUM ON ELECTRONIC SYSTEM DESIGN (ISED 2012), 2012, : 241 - 245