High-throughput architecture for H.264/AVC CABAC compression system

被引:56
|
作者
Osorio, Roberto R. [1 ]
Bruguera, Javier D. [1 ]
机构
[1] Univ Santiago de Compostela, Dept Elect & Comp Sci, Santiago De Compostela 15782, Spain
关键词
application specific integrated circuits (ASICs); arithmetic codes; entropy codes; H.264/AVC; video coding;
D O I
10.1109/TCSVT.2006.883508
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
New image and video coding standards have pushed the limits of compression by introducing new techniques with high computational demands. The Advanced Video Coder (ITU-T H.264, AVC MPEG-4 Part 10) is the last international standard, which introduces new enhanced features that require new levels of performance. Among the new tools present in AVC, the context-based binary arithmetic coder (CABAC) offers significant compression advantage over baseline entropy coders. CABAC is meant to be used in AVC's Main and High Profiles, which target broadcast and video storage and distribution of standard and high-definition contents. In these applications, hardware acceleration is needed as the computational load of CABAC is high, challenging programmable processors. Moreover, rate-distortion optimization (RDO) increases CABAC's load by two orders of magnitude. In this paper, we present a fast and new architecture for arithmetic coding adapted to the characteristics of CABAC, including optimized use of memory and context managing and fast processing able to encode more than two symbols per cycle. A maximum processing speed of 185 MHz has been obtained for 0.35 mu, able to encode high quality video in real time. Some of the proposed optimization may also be applied to software implementations obtaining significant improvements.
引用
收藏
页码:1376 / 1384
页数:9
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