共 50 条
- [1] Results of benchmarking of advanced CD-SEMs at the 90-nm CMOS technology node [J]. METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XVIII, PTS 1 AND 2, 2004, 5375 : 151 - 172
- [2] Specifications and methodologies for benchmarking of advanced CD-SEMs at the 90nm CMOS technology node and beyond [J]. METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XVII, PTS 1 AND 2, 2003, 5038 : 1038 - 1052
- [3] Accurate gate CD control for 130nm CMOS technology node [J]. 2003 IEEE INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING, CONFERENCE PROCEEDINGS, 2003, : 183 - 186
- [4] Status of ArF lithography for the 130nm technology node [J]. OPTICAL MICROLITHOGRAPHY XIII, PTS 1 AND 2, 2000, 4000 : 410 - 422
- [5] A Cu interconnect process for the 130nm process technology node [J]. ADVANCED METALLIZATION CONFERENCE 2001 (AMC 2001), 2001, : 39 - 41
- [6] Benchmarking of advanced CD-SEMs against the new unified specification for sub-0.18 micrometer lithography [J]. METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XIV, 2000, 3998 : 12 - 27
- [7] Design of Passive UHF RFID Tag in 130nm CMOS Technology [J]. 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4, 2008, : 1371 - 1374
- [8] Low-Leakage ESD Structures in 130nm CMOS Technology [J]. PROCEEDINGS OF THE 2020 30TH INTERNATIONAL CONFERENCE RADIOELEKTRONIKA (RADIOELEKTRONIKA), 2020, : 177 - 180
- [9] Benchmarking of advanced CD-SEMs against the new unified specification for sub-0.18 micrometer lithography [J]. CHALLENGES IN PROCESS INTEGRATION AND DEVICE TECHNOLOGY, 2000, 4181 : 42 - 57
- [10] Statistical characterization of hold time violations in 130nm CMOS technology [J]. ESSCIRC 2006: PROCEEDINGS OF THE 32ND EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2006, : 114 - +