Teaching hardware description languages to satisfy industry expectations

被引:1
|
作者
Greenwood, Garrison W. [1 ]
机构
[1] Portland State Univ, Dept Elect & Comp Engn, Portland, OR 97207 USA
关键词
hardware description languages; prototyping; RTL; synthesis; teaching digital design;
D O I
10.7227/IJEEE.46.3.3
中图分类号
G40 [教育学];
学科分类号
040101 ; 120403 ;
摘要
Industry demands that computer engineers have expertise in FPGA prototyping. A broad knowledge of a hardware description language (HDL) such as Verilog or VHDL is no longer sufficient. Industry expects engineers to write RTL-synthesizable code. Unfortunately, many colleges do not teach this material because the HDL is taught as a secondary topic in a digital design course. That approach does not allow sufficient time to cover efficient coding practices, the use of third-party IP and other essential topics. This paper describes an FPGA prototyping course, based on the Verilog HDL, that is completely separate from any digital design course. The prototyping course is supplemented with FPGA vendor application notes, uses industry-standard EDA tools and fully meets industry expectations.
引用
收藏
页码:239 / 247
页数:9
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