Negative bias temperature instability in triple gate transistors

被引：41

作者：

Maeda, S ^{[1
]}

Choi, JA ^{[1
]}

Yang, JH ^{[1
]}

Jin, YS ^{[1
]}

Bae, SK ^{[1
]}

Kim, YW ^{[1
]}

Suh, KP ^{[1
]}

机构：

[1] Samsung Elect, Technol Dev Team, Syst LSI Div, Yongin 449711, Gyeonggi Do, South Korea

来源：

2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS | 2004年

关键词：

negative bias temperature instability; NBTI; triple gate transistor; crystal orientation;

D O I：

10.1109/RELPHY.2004.1315293

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Negative bias temperature instability (NBTI) in triple gate transistors was investigated for the first time. It is found that the threshold voltage shift caused by negative bias temperature stress in conventional configuration of triple gate transistors is worse than that in planar transistors. This is due to the larger trap state density of the {110} side surface of the active silicon and it is verified by comparing two types of triple gate transistors each of which has {110} side surface and {100} side surface. The <100>-direction channel is proposed as one of the structural options to reduce the degradation of NBTI in triple gate transistors.

引用

页码：8 / 12

页数：5

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