Two-step switching scheme for SAR ADC with high energy efficiency

被引：4
|
作者：
Zhang, Chenggao [1 ]
Liu, Shubin [1 ]
Zhu, Zhangming [1 ]
机构：
[1] Xidian Univ, Sch Microelect, 2 Taibai Rd, Xian 710071, Shaanxi, Peoples R China
来源：
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2018年 / 96卷 / 01期
基金：
中国国家自然科学基金;
关键词：
SAR ADC; Energy-efficiency switching scheme; Reset energy; Capacitor saving; CMOS;
D O I：
10.1007/s10470-018-1210-9
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The paper presents two high energy-efficiency switching schemes for the successive approximation register (SAR) analogue-to-digital converter (ADC). The first scheme is a part of the second one. The new switching schemes achieves no switching energy consumption in the first three comparison, and need no reset energy. Thus, compared with the conventional SAR architecture, 99.23 and 99.42% reduction in switching energy is achieved respectively. Moreover, the total scheme achieves an 86.7% reduction in unit capacitor number by its special architecture.
引用
收藏
页码：189 / 195
页数：7
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