Challenges in Scaling Software-Based Self-Testing to Multithreaded Chip Multiprocessors

被引:0
|
作者
Gizopoulos, Dimitris [1 ]
机构
[1] Univ Piraeus, Piraeus, Greece
来源
2008 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, PROCEEDINGS | 2008年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Functional software-based self-testing (SBST) has been recently studied by leading academic research groups and applied by major microprocessor manufacturers as a complement to other classic structural testing techniques for microprocessors and processor-based SoCs. Is the SBST paradigm scalable to testing multithreaded chip multiprocessors (CMP's) and effectively detect faults not only in the functional components but also in the thread-specific and core interoperability logic? We study the challenges in scaling existing software-based self-test capital (uniprocessor self- test programs and se Nest generation techniques) to real, multithreaded CMPs, like Sun's OpenSPARC T1 and T2. Since this type of CMPs is built around well studied microprocessor cores of mature architecture (like SPARC v9 in the OpenSPARC case), tailoring, enhancing and scheduling of existing uniprocessor self-test programs can be an effective methodology for software-based self-test of CMPs.
引用
收藏
页码:1034 / 1035
页数:2
相关论文
共 50 条
  • [1] Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors
    Apostolakis, Andreas
    Gizopoulos, Dimitris
    Psarakis, Mihalis
    Paschalis, Antonis
    IEEE TRANSACTIONS ON COMPUTERS, 2009, 58 (12) : 1682 - 1694
  • [2] Microprocessor Software-Based Self-Testing
    Psarakis, Mihalis
    Gizopoulos, Dimitris
    Sanchez, Ernesto
    Reorda, Matteo Sonza
    IEEE DESIGN & TEST OF COMPUTERS, 2010, 27 (03): : 4 - 18
  • [3] Software-based self-testing of microprocessors
    Sosnowski, J
    JOURNAL OF SYSTEMS ARCHITECTURE, 2006, 52 (05) : 257 - 271
  • [4] Software-based self-testing of embedded processors
    Kranitis, N
    Paschalis, A
    Gizopoulos, D
    Xenoulis, G
    IEEE TRANSACTIONS ON COMPUTERS, 2005, 54 (04) : 461 - 475
  • [5] Software-based self-testing methodology for processor cores
    Chen, L
    Dey, S
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2001, 20 (03) : 369 - 380
  • [6] Embedded software-based self-testing for SoC design
    Krstic, A
    Lai, WC
    Chen, L
    Cheng, KT
    Dey, S
    39TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2002, 2002, : 355 - 360
  • [7] Software-Based Online Self-Testing of Network-on-Chip using Bounded Model Checking
    YingZhang
    Chakrabarty, Krishnendu
    Li, Huawei
    Jiang, Jianhui
    2017 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2017,
  • [8] Software-Based Self-Testing of Processors Using Expanded Instructions
    Zhang, Ying
    Li, Huawei
    Li, Xiaowei
    2010 19TH IEEE ASIAN TEST SYMPOSIUM (ATS 2010), 2010, : 415 - 420
  • [9] A Hybrid Software-Based Self-Testing methodology for Embedded Processor
    Lu, Tai-Hua
    Chen, Chung-Ho
    Lee, Kuen-Jong
    APPLIED COMPUTING 2008, VOLS 1-3, 2008, : 1528 - 1534
  • [10] Deterministic software-based self-testing of embedded processor cores
    Paschalis, A
    Gizopoulos, D
    Kranitis, N
    Psarakis, M
    Zorian, Y
    DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS, 2001, : 92 - 96