Design Of A Globally Asynchronous Locally Synchronous Digital System

被引：0
|
作者：
Nagy, Lukas [1 ]
Koscelansky, Jan [1 ]
Stopjakova, Viera [1 ]
机构：
[1] Slovak Univ Technol Bratislava, Inst Elect & Photon, Ilkovicova 3, Bratislava 81219, Slovakia
来源：
12TH IEEE INTERNATIONAL CONFERENCE ON EMERGING ELEARNING TECHNOLOGIES AND APPLICATIONS (ICETA 2014) | 2014年
关键词：
Asynchronous digital system; GALS;
D O I：
暂无
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
The article addresses a design methodology of globally asynchronous locally synchronous (GALS) digital systems from the designer's point of view. It discusses the nature of this special type of electronic circuits, its advantages as well as drawbacks as comparison to standard synchronous and asynchronous systems. Furthermore, it describes the top-down design flow for various implementation approaches. The first one is the implementation onto silicon chip as ASIC, the second one is the implementation into the FPGA. The paper also discusses the comparison of three different implementations of the same circuitry.
引用
收藏
页码：529 / 533
页数：5
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