A Compact Digital Amplitude Modulator in 90nm CMOS

被引：0
|
作者：
Chironi, V. [1 ]
Debaillie, B. [2 ]
Baschirotto, A. [1 ,3 ]
Craninckx, J. [2 ]
Ingels, M. [2 ]
机构：
[1] Univ Salento, Dept Innovat Engn, Lecce, Italy
[2] IMEC, Leuven, Belgium
[3] Univ Milano Bicocca, Dept Phys G Occhialini, Milan, Italy
来源：
2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010) | 2010年
关键词：
ENVELOPE MODULATOR;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a 90 nm CMOS digital amplitude modulator for polar transmitter. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB EVM and 18% efficiency. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. The amplitude modulator has a segmented architecture. This results in a very compact 0.007 mm(2) chip area.
引用
收藏
页码：702 / 705
页数：4
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