Challenges of Memory Management on Modern NUMA Systems

被引:30
|
作者
Gaud, Fabien [1 ]
Lepers, Baptiste [2 ]
Funston, Justin [3 ]
Dashti, Mohammad [3 ]
Fedorova, Alexandra [4 ]
Quema, Vivien [5 ]
Lachaize, Renaud [6 ]
Roth, Mark
机构
[1] Coho Data, Focusing Performance & Scalabil, Palo Alto, CA 94303 USA
[2] Ecole Polytech Fed Lausanne, Lausanne, Switzerland
[3] Univ British Columbia, Vancouver, BC V5Z 1M9, Canada
[4] Univ British Columbia, ECE Dept, Vancouver, BC V5Z 1M9, Canada
[5] Grenoble INP ENSIMAG, Grenoble, France
[6] Univ Grenoble, Grenoble, France
关键词
D O I
10.1145/2814328
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The latency of memory access times is hence non-uniform, because it depends on where the request originates and where it is destined to go. Such systems are referred to as nonuniform memory access (or NUMA). Current x86 NUMA systems are cache coherent (called ccNUMA), which means programs can transparently access memory on local and remote nodes without changes to the code or special operating system support. Experiments have shown that Congestion happens when the rate of requests to memory controllers or the rate of traffic over interconnects is too high, which causes excessive delays for memory accesses. It can be alleviated by balancing the traffic among multiple memory controllers and interconnect links. The other factor of NUMA performance is locality, which is what previous NUMA algorithms have focused on. As NUMA systems grow and the number of cores issuing memory requests increases, NUMA effects will continue being a concern. Carrefour demonstrates a collection of techniques that effectively reduce these concerns.
引用
收藏
页码:59 / 66
页数:8
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