A New Hybrid Submodule for MMC with DC Fault Ride-Through Capability

被引：0

作者：

Rudrasimha, Yedida Ayyappa ^{[1
]}

Ghat, Mahendra B. ^{[1
]}

Shukla, Anshuman ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Elect Engn, Mumbai 400076, Maharashtra, India

来源：

2018 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES) | 2018年

关键词：

DC fault tolerant multilevel converters; MMC; Anti-parallel thyristor; Hybrid submodule topology; HVDC; CONVERTERS;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Modular multilevel converter (MMC) has become the most prominent topology for high voltage direct current. (HVDC) applications due to its modularity, lower losses, less filtering requirements and flexible controllability. However, MMC still lacks in terms of efficiency and fault tolerant capability compared to the line commutated converters (LCC) based HVDC systems. This paper proposes a thyristor bypassed fault tolerant half bridge submodule (TBFT-HBSM) for MMC to achieve high efficiency as that in LCC while retaining DC fault tolerant capability and controllability. The lower switch of conventional HBSMs is replaced by anti-parallel thyristor switches to reduce the overall conduction losses of the converter. A new control algorithm has been proposed to balance the arm voltages. Moreover, loss analysis of proposed submodule (SM) is carried out and its efficiency compared with existing SM topologies. Simulation as well as experimental studies are carried out to verify the effectiveness of the proposed SM structure and its control.

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页数：6

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