Fault Simulation for Analog Test Coverage

被引:0
|
作者
Sequeira, Jyotsna [1 ]
Natarajan, Suriyaprakash [1 ]
Goteti, Prashant [1 ]
Chaudhary, Nitin [1 ]
机构
[1] Intel Corp, Santa Clara, CA 95051 USA
关键词
TEST METRICS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A practical fault simulation methodology for analog circuits in mixed-signal designs is presented. The methodology leverages the mixed-signal simulation environment of a product and performs mixed-signal fault simulation of embedded analog circuits. A set of open-circuit and short-circuit faults are extracted with guidance from layout parasitics, and automatically injected in to the netlist. Fault coverage of manufacturing tests on faults in the transmitter of a high speed serial interface design are reported with two different observation criteria. Results indicate the amount of test reduction that can be achieved and the importance of appropriate observation in fault detection.
引用
收藏
页数:7
相关论文
共 50 条
  • [1] Using simulation to improve fault coverage of analog and mixed-signal test program sets
    Majernik, D
    Lynch, B
    Siegel, C
    Teegarden, D
    Eram, R
    AUTOTESTCON '97 - IEEE SYSTEMS READINESS TECHNOLOGY CONFERENCE, 1997 IEEE AUTOTESTCON PROCEEDINGS, 1997, : 371 - 375
  • [2] Estimating the fault coverage of functional test sequences without fault simulation
    Pomeranz, Irith
    Parvathala, Praveen K.
    Patil, Srinivas
    PROCEEDINGS OF THE 16TH ASIAN TEST SYMPOSIUM, 2007, : 25 - +
  • [3] An integrated tool for analog test generation and fault simulation
    Ozev, S
    Orailoglu, A
    PROCEEDING OF THE 2002 3RD INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2002, : 267 - 272
  • [4] Parametric and catastrophic fault coverage of analog circuits in oscillation-test methodology
    Arabi, K
    Kaminska, B
    15TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1997, : 166 - 171
  • [5] Framework for Analog Test Coverage
    Bhatta, Debesh
    Mukhopadhyay, Ishita
    Natarajan, Suriyaprakash
    Goteti, Prashant
    Xue, Bin
    PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 2013, : 468 - 475
  • [6] Defect-Based Analog Fault Coverage Analysis using Mixed-Mode Fault Simulation
    Park, Joonsung
    Madhavapeddi, Srinadh
    Paglieri, Alessandro
    Barr, Chris
    Abraham, Jacob A.
    2009 IEEE 15TH INTERNATIONAL MIXED-SIGNALS, SENSORS, AND SYSTEMS TEST WORKSHOPS, 2009, : 36 - +
  • [7] New Methods for Simulation Speed-up and Test Qualification With Analog Fault Simulation
    Devanathan, V. R.
    Balasubramanian, Lakshmanan
    Parekhji, Rubin
    2015 28TH INTERNATIONAL CONFERENCE ON VLSI DESIGN (VLSID), 2015, : 363 - 368
  • [8] Improving Time-Efficiency of Fault-Coverage Simulation for MOS Analog Circuit
    Liu, Zhiqiang
    Chaganti, Shravan K.
    Chen, Degang
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65 (05) : 1664 - 1674
  • [9] Automatic analog fault simulation
    Spence, H
    Carmichael, N
    Camargo, C
    AUTOTESTCON '96 - THE SYSTEM READINESS TECHNOLOGY CONFERENCE: TEST TECHNOLOGY AND COMMERCIALIZATION, CONFERENCE RECORD, 1996, : 17 - 22
  • [10] Analog Fault Coverage Improvement using Final-Test Dynamic Part Average Testing
    Dobbelaere, Wim
    Vanhooren, Ronny
    De Man, Willy
    Matthijs, Koen
    Coyette, Anthony
    Esen, Baris
    Gielen, Georges
    PROCEEDINGS 2016 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2016,