Performance Analysis of Scaler SoC for 4K Video Signal

被引：0

作者：

Lee, Soon-Jin ^{[1
]}

Han, Jong-Ki ^{[1
]}

机构：

[1] Sejong Univ, Seoul, South Korea

来源：

ADVANCES IN MULTIMEDIA INFORMATION PROCESSING - PCM 2015, PT II | 2015年 / 9315卷

关键词：

Cubic convolution scaler; Interpolation; System on chip; INTERPOLATION;

D O I：

10.1007/978-3-319-24078-7_28

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper considers some issues to implement the scaler SoC. Because the size and power of SoC are constrained, the bit number to represent the coefficients of scaler kernel and LPF should be limited. In addition, the interpolation position should be located at the quantized phases. We analyze the effects of the various constraints in the performance of scaling system. The simulation results provide the guidance to implement the scaler SoC.

引用

页码：285 / 291

页数：7

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