Reducing occurrences of priority inversion in MSoC's using dynamic processor priority assignment

In a single processor real-time system the question whether a taskset is schedulable or not is essential and not always easy to answer, and it is even more challenging in multiprocessor real-time systems. To determine the schedulability of a taskset the maximum blocking time far each task must be known. When considering schedulability of tasks on a multiprocessor with a shared bus, both local blocking and interprocessor blocking must be known and considered. To reduce the time high priority tasks are blocked by low priority task on a shared bus multiprocessor system we propose a dynamic priority based arbitration of processors. In our proposal, a processor's priority is a direct mapping of the relative priority of all tasks currently executing, The mapping of priorities onto processors is managed by a hardware operating system kernel which continuously updates the arbiter with priority changes. The information shared between the hardware operating system and the arbiter is done in parallel and does not put additional strain on bus traffic. The solution is implemented by augmenting an hardware realtime scheduler and an arbiter unit with added functionality. Systems-on-a-Chip (SoC's) offers the design freedom needed for our proposed solution to reduce occurrences of priority inversion in Multiprocessor SoC (MSoC).