共 50 条
- [1] Efficient Verification of Parameterized Cache Coherence Protocols [J]. PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE FOR YOUNG COMPUTER SCIENTISTS, VOLS 1-5, 2008, : 154 - 159
- [2] A simple method for parameterized verification of cache coherence Protocols [J]. FORMAL METHODS IN COMPUTER-AIDED DESIGN, 2004, 3312 : 382 - 398
- [3] Exact and efficient verification of parameterized cache coherence protocols [J]. CORRECT HARDWARE DESIGN AND VERIFICATION METHODS, PROCEEDINGS, 2003, 2860 : 247 - 262
- [4] A simple method for parameterized verification of cache coherence protocols [J]. FORMAL METHODS IN COMPUTER-AIDED DESIGN, PROCEEDINGS, 2004, 3312 : 382 - 398
- [5] A Novel Approach to Parameterized Verification of Cache Coherence Protocols [J]. PROCEEDINGS OF THE 34TH IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2016, : 560 - 567
- [6] Counterexample guided invariant discovery for parameterized cache coherence verification [J]. CORRECT HARDWARE DESIGN AND VERIFICATION METHODS, PROCEEDINGS, 2005, 3725 : 317 - 331
- [7] Constraint-Based Verification of Parameterized Cache Coherence Protocols [J]. Formal Methods in System Design, 2003, 23 : 257 - 301
- [10] VERIFICATION OF THE FUTUREBUS+ CACHE COHERENCE PROTOCOL [J]. COMPUTER HARDWARE DESCRIPTION LANGUAGES AND THEIR APPLICATIONS, 1993, 32 : 15 - 30