Multi-rate Iterated Timing Analysis-based Incremental Circuit Simulation Considering Global Design Changes

被引：0

作者：

Chen, Chun-Jung ^{[1
]}

机构：

[1] Chinese Culture Univ, Dept Comp Sci, Taipei, Taiwan

来源：

2010 THE 3RD INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND INDUSTRIAL APPLICATION (PACIIA2010), VOL III | 2010年

关键词：

Circuit simulation; relaxation-based algorithms; incremental simulation; Iterated Timing Analysis;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Circuit level incremental simulation is an alternative strategy not only to reduce the circuit simulation time but also to maintain the simulation accuracy. This paper investigates the incremental simulation using the well-known ITA (Iterated Timing Analysis) algorithm for large-scale MOSFET circuits. The global design change has been considered. Also, a new incremental simulation strategy is presented. All proposed methods have been implemented and tested to justify their advantages.

引用

下载

页码：448 / 451

页数：4

共 9 条

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