30Gbit/s 1:4 demultiplexer IC using AlGaAs/GaAs HBTs

被引：3
|
作者：
Runge, K
Pierson, RL
Zampardi, PJ
Thomas, PB
Yu, J
Wang, KC
机构：
[1] Rockwell Science Center, Thousand Oaks, CA 91360
来源：
ELECTRONICS LETTERS | 1997年 / 33卷 / 09期
关键词：
demultiplexing equipment; integrated circuits;
D O I：
10.1049/el:19970496
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An experimental high speed 1:4 demultiplexer integrated circuit featuring output bit alignment, reduced gale count, and a never circuit architecture is presented. The experimental circuit features an inherently fast two-stage configuration, with operation at up to 30 Gbit/s demonstrated in an advanced AlGaAs/GaAs heterojunction bipolar technology. The system dock frequency is half the bit rate with only one additional self-generated internal clock necessary.
引用
收藏
页码：765 / 766
页数：2
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