共 50 条
- [1] Formal Verification of GP Specification based Embedded Operating System [J]. PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND APPLICATION ENGINEERING (CSAE2018), 2018,
- [3] Formal Verification for Embedded System Designs [J]. Design Automation for Embedded Systems, 2003, 8 : 139 - 153
- [4] Using Reo for formal specification and verification of system designs [J]. FOURTH ACM & IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR CO-DESIGN, PROCEEDINGS, 2006, : 113 - +
- [5] Formal specification and verification of VHDL [J]. FORMAL METHODS IN COMPUTER-AIDED DESIGN, 1996, 1166 : 310 - 326
- [6] Formal Specification and Verification of CRDTs [J]. FORMAL TECHNIQUES FOR DISTRIBUTED OBJECTS, COMPONENTS, AND SYSTEMS, 2014, 8461 : 33 - 48
- [8] Formal verification of embedded logic controller specification with computer deduction in temporal logic [J]. PRZEGLAD ELEKTROTECHNICZNY, 2011, 87 (12A): : 47 - 50
- [9] Verification of a microcomputer program specification embedded in a reactive system [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2000, E83D (05): : 1082 - 1091