A 15-bit Two-Step Sigma-Delta ADC With Embedded Compression For Image Sensor Array

被引：0
|
作者：
Yue, Mengyun [1 ]
Wu, Dong [1 ]
Wang, Zheyao [1 ]
机构：
[1] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China
来源：
2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2013年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a novel incremental Sigma-Delta ADC using two-step conversion and the fully-floating double-sampling integrator to greatly reduce the converting time. With a special procedure to solve the accuracy loss problem, the resolution of ADC is improved by one bit at the same time. What's more, another comparison is added during the conversion to detect redundant pixels in the image so that data compression is achieved in a simple way.
引用
收藏
页码：2038 / 2041
页数：4
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