Random Interleaved Pipeline Countermeasure Against Power Analysis Attacks

被引：0

作者：

Menicocci, Renato ^{[1
]}

Trifiletti, Alessandro ^{[2
]}

Trotta, Francesco ^{[2
]}

机构：

[1] Fdn Ugo Bordoni, Rome, Italy

[2] Sapienza Univ Roma, Dipartmento Ingn Informaz Elect & Telecommun, Rome, Italy

来源：

2013 9TH CONFERENCE ON PH. D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME 2013) | 2013年

关键词：

Side Channel Attack; DPA; CPA; RTL countermeasure; AES; FPGA;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An RTL countermeasure intended to protect the AddRoundKey and SubByte steps of the AES algorithm against DPA or CPA attacks has been proposed and tested on an AES encoding coprocessor implemented on FPGA. Experimental results based on first order CPA attacks confirmed the effectiveness of the proposed countermeasure, especially in protecting the SBOX output, showing that even with the acquisition of 300000 power curves, the absolute value of correlation function is embedded in the measured noise floor and there are no peaks able to reveal the encryption key.

引用

页码：145 / 148

页数：4

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