A Low-Power Multimedia SoC with Fully Programmable 3D Graphics for Mobile Devices

被引：7

作者：

Woo, Jeong-Ho ^{[1
]}

Kim, Hyejung ^{[1
]}

Yoo, Hoi-Jun ^{[1
]}

Sohn, Ju-Ho ^{[2
]}

机构：

[1] Korea Adv Inst Sci & Technol, Taejon 305701, South Korea

[2] LG Elect Korea, Seoul, South Korea

来源：

IEEE COMPUTER GRAPHICS AND APPLICATIONS | 2009年 / 29卷 / 05期

关键词：

ARITHMETIC UNIT; PROCESSOR;

D O I：

10.1109/MCG.2009.88

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

Unifying vertex and pixel shading on a single chip is the basis of a fully programmable 3D graphics pipeline integrated with an MPEG4/JPEG codec and H. 264 decoder SoC for mobile devices. The 6.4 x 6.4 mm SoC consumes less than 195 mW at 1.2 V and 100 MHz for 3D graphics applications.

引用

页码：82 / 90

页数：9

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