A 0.35μm CMOS Sub-1V Low-Quiescent-Current Low-Dropout Regulator

被引：15

作者：

Hwang, Yuh-Shyan ^{[1
]}

Lin, Ming-Shian ^{[1
]}

Hwang, Bo-Han ^{[1
]}

Chen, Jiann-Jong ^{[1
]}

机构：

[1] Natl Taipei Univ Technol, Taipei 106, Taiwan

来源：

2008 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE | 2008年

关键词：

low-dropout regulator; low-quiescent current; digital error amplifier;

D O I：

10.1109/ASSCC.2008.4708751

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A sub-1V CMOS low-dropout (LDO) voltage regulator with 103nA low-quiescent current is presented in this paper. The proposed LDO uses a digital error amplifier that can make the quiescent current lower than other LDOs with the traditional error amplifier. Besides, the LDO can be stable even without the output capacitor. With a 0.9V power supply, the output voltage is designed as 0.5V. The maximum output current of the LDO is 50mA at an output of 0.5V. The prototype of the LDO is fabricated with TSMC 0.35 mu m CMOS processes. The active area without pads is only 240 mu m x 400 mu m.

引用

页码：153 / 156

页数：4

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