A reconfigurable processor architecture

被引：0
|
作者：
Niyonkuru, A [1 ]
Eggers, G [1 ]
Zeidler, HC [1 ]
机构：
[1] Univ Bundeswehr Hamburg, D-22043 Hamburg, Germany
来源：
FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS: RECONFIGURABLE COMPUTING IS GOING MAINSTREAM | 2002年 / 2438卷
关键词：
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Until now, the lack of software and hardware compatibility between existing reconfigurable processors make them less competitive with hard-wired processors for mainstream computing. In this paper we propose a reconfigurable processor architecture based on the von-Neumann computing model, so that software compatibility can be achieved with minimal work. Furthermore, the proposed processor takes advantage of key features of some FPGAs like partial and dynamic reconfiguration to load on-the-fly a variable number of different coarse-grained execution units.
引用
收藏
页码：1160 / 1163
页数：4
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