共 50 条
- [31] An all Digital Frequency-Locked Loop Immune to Hysteresis Effects for Power Management of Multicore Processors 2010 IEEE INTERNATIONAL SOI CONFERENCE, 2010,
- [34] Gedae's automated management of hierarchical memories on multicore processors 2008 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING, VOLS 1-8, 2008, : 29 - +
- [35] Analysis of the Effectiveness of Core Swapping in Modern Multicore Processors 2013 19TH INTERNATIONAL WORKSHOP ON THERMAL INVESTIGATIONS OF ICS AND SYSTEMS (THERMINIC), 2013, : 385 - 388
- [36] Static timing analysis of shared caches for multicore processors Zhang, W. (wzhang4@vcu.edu), 1600, Korean Institute of Information Scientists and Engineers (06):
- [38] Multicore processors as array processors: Research opportunities IEEE 17th International Conference on Application-Specific Systems, Architectures and Processors, Proceedings, 2006, : 169 - 169
- [39] A Power Model Combined of Architectural Level and Gate Level for Multicore Processors 2013 12TH IEEE INTERNATIONAL CONFERENCE ON TRUST, SECURITY AND PRIVACY IN COMPUTING AND COMMUNICATIONS (TRUSTCOM 2013), 2013, : 1652 - 1655