Characteristics of n-MOSFETs with Stress Effects from Neighborhood Devices

In this paper, we study the impact of stress effect on n-MOSFET characteristics, from neighborhood device active area (NDAA) and surrounding shallow trench isolation (SSTI), in addition to the stress from its own active area (AA) and shallow trench isolation (STI). With a group of test structures at a 40nm technology, measurement data are performed and analyzed to understand the impacts of the neighbor device active area width(NDAAW), located in the direction along the channel length, on the device parameters, such as saturation drain current (Idsat), threshold voltage (Vth), and leakage current (Ioff). It was found that the Idsat increases by similar to 13.6%, Vth decreases by similar to 15.7%, and Ioff increases by even five times, compared with the standard devices without these surrounding devices, due to the additional impacts from the NDAA and SSTI. It is suggested that some parameters such as STIW, NDAAW and SSTIW should be added to the existing SPICE models as new parameters to consider the surrounding devices effects for accurate modeling of n-MOSFET in 40nm process technology. Moreover, the impacts of stress effects from neighborhood devices to the n-MOSFET characteristics should be considered in designs of standard cells in 40nm and below processes.