A concurrent fault-detection scheme for FFT processors

被引：1
|
作者：
Tsunoyama, M
Uenoyama, M
Kabasawa, T
机构：
来源：
SIXTH ASIAN TEST SYMPOSIUM (ATS'97), PROCEEDINGS | 1997年
关键词：
D O I：
10.1109/ATS.1997.643928
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
This paper proposes a concurrent fault-detection scheme for FFT processors. In the scheme, fault detection is made by comparing the pair of outputs from butterfly units based on the FFT algorithm. The hardware overhead for the scheme is O(N) where N is the number of input data. This scheme requires no extra computations for locating a pair of faulty butterfly units, therefore, the scheme can be used for highly reliable real-time systems.
引用
收藏
页码：94 / 99
页数：6
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