Static Digital Pre-Distortion Method for High-Speed Current-Steering Digital-to-Analog Converters

This paper presents a static digital pre-distortion (DPD) method for a current-steering digital-to-analog converter (CS-DAC). The proposed model utilizes the knowledge of the current cell array architecture to calculate the static mismatch currents of the cells. The mismatch values of all cells are stored in memory and added to the original input code to generate the new pre-distorted input word. The converter corrects the static error with its own current cells without incorporating an additional calibration DAC (CALDAC) or programmable current sources. This results in a reduction in area, power and simulation run times because of the simpler circuit design. The proposed method is able to use an information signal for the calibration phase, thus it is possible to be implemented as a background calibration. The evaluation of the proposed DPD is done via simulations in MATLAB with a 14-bit static CS-DAC model. The results show a performance gain of the signal-to-noise-plus-distortion ratio (SNDR) of up to 16 dB.