High-Frequency Phase/Frequency Detectors: Analysis for Oscillation-Free Optimal I/O

被引：4

作者：

Chen, Roger Yubtzuan ^{[1
]}

Yang, Zong-Yi ^{[2
]}

Yu, Shun-Chieh ^{[1
]}

机构：

[1] Natl Yunlin Univ Sci & Technol, Elect Engn Dept, Touliu 64002, Yunlin, Taiwan

[2] Natl Yunlin Univ Sci & Technol, Ctr Proc Safety & Ind Disaster Prevent, Touliu 64002, Yunlin, Taiwan

来源：

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | 2020年 / 30卷 / 11期

关键词：

Phase frequency detector; Phase locked loops; Delays; Detectors; Time-frequency analysis; Image edge detection; Clocks; Cascaded phase-locked loop (PLL); phase; frequency detector (PFD);

D O I：

10.1109/LMWC.2020.3024897

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Phase/frequency detectors (PFDs), equipped with blind zone (BZ) relieving delay elements (DEs), are studied. DE design guidelines for oscillation-free optimal PFD I/O characteristics, along with detailed validation, are presented. This PFD study is useful for the design of charge-pumped phase-locked loops (CP-PLLs) that employ high-frequency input clocks.

引用

页码：1097 / 1100

页数：4

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