An analyzable on-chip network architecture for embedded systems

被引：0
|
作者：
Luedtke, Daniel [1 ]
Tutsch, Dietmar [1 ]
Hommel, Guenter [1 ]
机构：
[1] Tech Univ Berlin, Real Time Syst & Robot, Berlin, Germany
来源：
EMBEDDED SYSTEMS - MODELING, TECHNOLOGY AND APPLICATIONS, PROCEEDINGS | 2006年
关键词：
D O I：
10.1007/1-4020-4933-1_7
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：63 / +
页数：3
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