Circuit editing of copper and low-k dielectrics in nanotechnology devices

被引:4
|
作者
Mosselveld, F
Makarov, VV
Lundquist, TR
Griffis, DP
Russell, PE
机构
[1] NPTest, San Jose, CA 95134 USA
[2] N Carolina State Univ, Raleigh, NC 27695 USA
关键词
copper etching; device modification; low-k dielectrics;
D O I
10.1111/j.0022-2720.2004.01337.x
中图分类号
TH742 [显微镜];
学科分类号
摘要
Circuit editing of integrated circuit (IC) devices fabricated in 100-nm and smaller technologies has moved IC microsurgery into nanosurgery. Although the dimensions are challenging, an additional challenge is to mill the dielectric materials that are employed controllably. There are interesting biological similarities as carbon content and porosity increase in order to minimize the dielectric constant. These porous organic materials are extremely delicate and are readily carbonized under the ion beam. Besides minimizing carbonization, the etching of these materials must be minimized during the removal of a metallized area. A further challenge has been caused by the continuing tightening of fabrication specifications; the dielectric materials are dispersed (although not randomly) within the metallizations in order to reduce variations during a planarization process. In addition, to improve planarization tolerances, dummy metallizations are placed in regions where the need is only mechanical and not electrical. Neither of these 'extra' structures is readily available to assist in edit planning. To address these dielectrics and the structures in which they are found, several techniques - including chemistries - have been developed. Methods to increase the etching of metallization relative to the dielectric are reviewed, including chemistries that improve the selectivity of copper to dielectric.
引用
收藏
页码:246 / 251
页数:6
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