A-86.88 dBc/Hz @ 1MHz K-band fractional-N frequency synthesizer in 90-nm CMOS technology

被引：1

作者：

Wang Zhengchen ^{[1
]}

Wu Zhaobo ^{[1
]}

Wang Xinghua ^{[1
]}

机构：

[1] Beijing Silicon SoC Engn Res Ctr, Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China

来源：

IEICE ELECTRONICS EXPRESS | 2018年 / 15卷 / 02期

基金：

中国国家自然科学基金;

关键词：

frequency synthesizer; phase noise; charge pump; MMD; retime technique; DIFFERENTIAL CHARGE PUMP; DESIGN;

D O I：

10.1587/elex.15.20171063

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Through 90-nm CMOS technology, a K-band fractional-N frequency synthesizer has been designed. This paper proposes a new analysis to evaluate the noise current of the charge pump in fractional-N frequency synthesizer. It also designs an improved charge pump (CP). In addition, it also presents the multi-modulus divider (MMD) by the retime technique. The measured phase noise achieves -93.5 dBc/Hz and -86.88 dBc/Hz for integer-N and fractional-N modes at 1MHz offset, respectively. The in-band phase noise performance can be improved about 20 dB by the retime technique. -54.63 dBc and -50.7 dBc reference spurs are respectively revealed by the spectrum for integer-N and fractional-N modes.

引用

页数：11

共 14 条

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