共 15 条
- [1] A 56Gb/s Burst-Mode NRZ Optical Receiver with 6.8ns Power-On and CDR-Lock Time for Adaptive Optical Links in 14nm FinFET CMOS 2018 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - (ISSCC), 2018, : 266 - +
- [2] A 60 Gb/s 1.9 pJ/bit NRZ Optical-Receiver with Low Latency Digital CDR in 14nm CMOS FinFET 2017 SYMPOSIUM ON VLSI CIRCUITS, 2017, : C320 - C321
- [3] A 2 x 20-Gb/s, 1.2-pJ/bit, Time-Interleaved Optical Receiver in 40-nm CMOS 2014 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 2014, : 97 - 100
- [4] A 32Gb/s, 4.7pJ/bit Optical Link with-11.7dBm Sensitivity in 14nm FinFET CMOS 2017 SYMPOSIUM ON VLSI CIRCUITS, 2017, : C318 - C319
- [5] Opto-Electrical Analog Front-End with Rapid Power-On and 0.82 pJ/bit for 28 Gb/s in 14 nm FinFET CMOS 2017 30TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2017, : 253 - 257
- [7] A 112Gb/s 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOS 2018 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - (ISSCC), 2018, : 104 - +
- [8] A 0.3pJ/bit 112Gb/s PAM4 1+0.5D TX-DFE Precoder and 8-tap FFE in 14nm CMOS 2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, 2018, : 53 - 54
- [9] A 52-Gb/s Sub-1pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power interconnects 2019 SYMPOSIUM ON VLSI CIRCUITS, 2019, : C274 - C275
- [10] A 52-Gb/s Sub-1-pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects IEEE Open Journal of Circuits and Systems, 2021, 2 : 46 - 55