CHALLENGES IN MATERIAL SELECTION FOR SIP APPLICATIONS

The recent surge in demand for system-in-package (SiP) applications is driven by the rapid development of connected "smart" devices. The versatility and capability of heterogeneous integration for SiP have made it a popular choice of packaging solutions for increased functionality in a smaller package form factor. This continues to push miniaturization to an even greater level, therefore creating assemblies with smaller component and greater density. Soldering materials, such as solder paste and flip-chip fluxes, will need to be chosen appropriately in order to form reliable solder joints and maximize production yields for complicated SiP applications. Fine feature solder paste printing for passive component sizes, down to 008004 (0.25 x 0.125mm) and smaller, or wafer level CSP (WLCSP) with small pad designs of less than 100 mu m in diameter, has become more challenging in SiP assembly. The appropriate choice of solder powder size, rheology of solder paste, and stencil design are crucial to achieve consistency in solder paste printing performance, which includes good printing transfer efficiency, minimal bridging down to 50 mu m gap between neighboring pads and at least 8 hours stencil life. Good wetting, graping resistance, and minimal voiding are some of the key attributes of solder paste to consider as well. On the other hand, as technology drives toward finer pitch components, combined with reduced bondline thickness or standoff of flip-chip or other IC packages, makes cleaning flux residue more challenging. The shift towards using semiconductor-grade ultra-low residue no-clean flip-chip fluxes or solder pastes, which eliminates the cleaning process, is therefore the solution for overcoming these challenges. The flux residue left behind after the soldering process is minimal and compatible with the underfill or molding material used in the subsequent process. This paper will address the challenges and discuss basic guidelines in detail with testing results, for selecting appropriate solder pastes and flip-chip fluxes based on different SiP designs and requirements in the packaging industry.