Optimal memory address seeds for pattern sensitive faults detection

被引：0

作者：

Yarmolik, S. V. ^{[1
,2
]}

Sokol, B. ^{[1
,2
]}

机构：

[1] Belarusian State Univ Informat & Radiol, Bialystok, Poland

[2] Bialystok Tech Univ, Bialystok, Poland

来源：

PROCEEDINGS OF THE 2006 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS | 2006年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The goal of this paper is to propose a new techniques for memory testing based on transparent memory march tests [1,4]. This paper deals with memory pattern sensitive faults detection problem. It shows the efficiency of multiple runs of march tests for memory passive pattern sensitive faults detection and analyzes the optimal address seeds for multiple march test runs. This paper provides only short fragment of carried researches. All results can be found in extended version of this paper.

引用

页码：220 / +

页数：2

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