Analysis of flicker and thermal noise in p-channel Under lap DG FinFET

被引:1
|
作者
Swain, Sanjit Kumar [1 ]
Adak, Sarosij [1 ]
Pati, Sudhansu Kumar [2 ]
Pardeshi, Hemant [1 ]
Sarkar, Chandan Kumar [1 ]
机构
[1] Jadavpur Univ, Dept Elect & Telecommun Engn, Nano Device Simulat Lab, Kolkata 700032, India
[2] Silicon Inst Technol, Bhubaneswar 751024, Orissa, India
关键词
Ultrathin body; p-Channel; Underlap DG FinFET; Virtual source; Flicker noise; Thermal noise; GATE-SOURCE/DRAIN UNDERLAP; FIELD-EFFECT TRANSISTORS; CAPACITANCE; MOSFETS; MODELS;
D O I
10.1016/j.microrel.2014.04.002
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we analyze the flicker and thermal noise model for underlap p-channel DG FinFET in weak inversion region. During the analysis of current and charge model, minimum channel potential i.e. virtual source is considered. Initially, the drain current for both long and short channel of DG FinFET are evaluated and found to be well interpreted with experimental results. Further, the flicker and thermal noise spectral density are derived. The flicker noise power spectral density is compared with published experimental results, which shows a good agreement between proposed model and experimental result. During calculation we have considered variation of scattering parameter and furthermore, the degradation of effective mobility is taken into account for ultrathin body. The variation of structural parameters such as gate length (L-g), body thickness (t(Si)) and underlap length (L-un) are also considered. The degradation of gate noise voltage with frequency, underlap length and gate length signify that p-channel DG FinFET device can be a promising candidate for analog and RF applications. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1549 / 1554
页数:6
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