Bounds for the number of DC operating points of transistor networks

被引：0
|
作者：
Lagarias, JC
Trajkovic, L
机构：
来源：
ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE | 1997年
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
A transistor network consisting of linear positive resistors, q exponential diodes, and p Ebers-Moll model bipolar transistors has at most (d+1)(d) 2(d(d-1)/2) de operating points, where d = q+2p. Bounds are also obtained for the number of operating points in circuits using other models for bipolar transistors.
引用
收藏
页码：857 / 860
页数：4
相关论文
共 50 条
  • [1] Bounds for the number of DC operating points of transistor circuits
    Lagarias, JC
    Trajkovic, L
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 1999, 46 (10): : 1216 - 1221
  • [2] THEORY OF DC OPERATING POINTS OF TRANSISTOR NETWORKS
    TRAJKOVIC, L
    WILLSON, AN
    [J]. AEU-ARCHIV FUR ELEKTRONIK UND UBERTRAGUNGSTECHNIK-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 1992, 46 (04): : 228 - 241
  • [3] DC operating points of transistor circuits
    Trajkovic, Ljiljana
    [J]. IEICE NONLINEAR THEORY AND ITS APPLICATIONS, 2012, 3 (03): : 287 - 300
  • [4] Limitations of criteria for testing transistor circuits for multiple dc operating points
    Kronenberg, L
    Mathis, W
    Trajkovic, L
    [J]. PROCEEDINGS OF THE 43RD IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 2000, : 1156 - 1159
  • [5] Limitations of criteria for testing transistor circuits for multiple dc operating points
    Kronenberg, L
    Mathis, W
    Trajkovic, L
    [J]. PROCEEDINGS OF THE 43RD IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 2000, : 148 - 151
  • [6] On the maximum number of DC solutions of general transistor networks
    Vargas-Bernal, R
    Sarmiento-Reyes, A
    Hernández-Martínez, L
    [J]. ICECS 2000: 7TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS & SYSTEMS, VOLS I AND II, 2000, : 928 - 931
  • [7] An Efficient Two-level DC Operating Points Finder for Transistor Circuits
    Deng, Jian
    Batselier, Kim
    Zhang, Yang
    Wong, Ngai
    [J]. 2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2014,
  • [8] Improved algorithm for computing all the DC operating points of diode-transistor circuits
    Tadeusiewicz, Michal
    Halgas, Stanislaw
    [J]. 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, 2009, : 489 - 492
  • [9] TRANSISTOR OPERATION - STABILIZATION OF OPERATING POINTS
    SHEA, RF
    [J]. PROCEEDINGS OF THE INSTITUTE OF RADIO ENGINEERS, 1952, 40 (11): : 1435 - 1437
  • [10] On the stability of operating points of transistor circuits
    Nishi, T
    Ogata, M
    [J]. IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1997, E80A (09) : 1540 - 1547
12345