Hardware/Software Co-design for Line Detection Algorithm on FPGA

被引：0
|
作者：
Kayankit, W. [1 ]
Suntiamorntut, W. [1 ]
机构：
[1] Prince Songkla Univ, Dept Comp Engn, Fac Engn, Hatyai Songkhla 90112, Thailand
来源：
ECTI-CON: 2009 6TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING/ELECTRONICS, COMPUTER, TELECOMMUNICATIONS AND INFORMATION TECHNOLOGY, VOLS 1 AND 2 | 2009年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents the design methodology of hardware/software co-design on FPGA. In this research work uses line detection algorithm to be our case study. C-based programming named ImpulseC has been employed. By using this, we could reduce the time of the design. Two main components are involved. Edge detection module is the first component. Various algorithms, Robert, Sobel and Prewitt, are compared. The best algorithm in term of performance and area is selected. The second component is bough transform. This module is divided into hardware and software due to the limit of the available logic block. At the end, the system both in hardware/software for line detection on FPGA is simulated.
引用
收藏
页码：569 / 571
页数：3
相关论文
共 50 条
  • [1] Hardware/Software Co-Design of a Lightweight Crypto Algorithm BORON on an FPGA
    Acar, Burak
    Ors, Berna
    [J]. 2017 10TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2017, : 1272 - 1276
  • [2] Hardware/Software Co-Design of a Lightweight Crypto Algorithm BORON on an FPGA
    Acar, Burak
    Ors, Berna
    [J]. 2017 10TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2017, : 1291 - 1295
  • [3] Hardware-Software Co-Design of AES on FPGA
    Baskaran, Saambhavi
    Rajalakshmi, Pachamuthu
    [J]. PROCEEDINGS OF THE 2012 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI'12), 2012, : 1118 - 1122
  • [4] On Teaching Hardware/Software Co-design using FPGA
    Bencheva, N.
    Kostadinov, N.
    Ruseva, Y.
    [J]. ELEKTRONIKA IR ELEKTROTECHNIKA, 2010, (06) : 91 - 94
  • [5] FPGA-Based Software Profiler for Hardware/Software Co-design
    Saad, El-Sayed M.
    Awadalla, Medhat H. A.
    El-Deen, Kareem Ezz
    [J]. NRSC: 2009 NATIONAL RADIO SCIENCE CONFERENCE: NRSC 2009, VOLS 1 AND 2, 2009, : 475 - 482
  • [6] Hardware/Software Co-design for Evolvable Hardware by Genetic Algorithm
    Shang, Qianyi
    Chen, Lijun
    Tong, Ruoxiong
    [J]. PROCEEDINGS OF 2020 IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE AND INFORMATION SYSTEMS (ICAIIS), 2020, : 306 - 309
  • [7] Hardware software co-design of a fast bilateral filter in FPGA
    Pal, Chandrajit
    Chaudhury, Kunal N.
    Samanta, Asit
    Chakrabarti, Amlan
    Ghosh, Ranjan
    [J]. 2013 ANNUAL IEEE INDIA CONFERENCE (INDICON), 2013,
  • [8] Hardware/Software co-design of a key point detector on FPGA
    Chati, H. Diakou
    Muehlbauer, F.
    Braun, T.
    Bobda, C.
    Berns, K.
    [J]. FCCM 2007: 15TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2007, : 355 - +
  • [9] Hardware/software co-design
    Edwards, M
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 1996, 20 (03) : 139 - 140
  • [10] The Systematic Thinking Ability of Hardware/Software Co-design using FPGA
    Li, Ying
    Zhang, Jiong
    Mitra, Hritik
    Yu, Shicheng
    [J]. 2020 IEEE FRONTIERS IN EDUCATION CONFERENCE (FIE 2020), 2020,
12345