Transient current compensation for low-voltage high-current voltage regulator modules

被引：3
|
作者：
Luo, J [1 ]
Batarseh, I [1 ]
Gao, XF [1 ]
Wu, T [1 ]
机构：
[1] Univ Cent Florida, Sch Elect Engn & Comp Sci, Orlando, FL 32816 USA
来源：
APEC 2002: SEVENTEENTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1 AND 23 | 2002年
关键词：
D O I：
10.1109/APEC.2002.989251
中图分类号：
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号：
0807 ; 0820 ;
摘要：
The maximum current slew rate of Pentium 4 microprocessor is 510A/us and it will reach more than 1A/ns for future generations. However, voltage regulator module (VRM) is always too slow (50A/us) to react and results in output voltage spikes. The existing of large socket inductance between motherboard and microprocessor package generates large voltage spike under load-change transient due to its current response delay. A new active transient current compensation is presented to limit voltage spike within 1.5% variation in load-change transient when microprocessor operates at 1V, 100A and 2A/ns of current slew rate with the package capacitance decreasing to less than one-half of Pentium 4 level. Therefore, the total voltage variation is limited within 3%.
引用
收藏
页码：223 / 228
页数：6
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