A MASH 1-1-1 ΔΣ time-to-digital converter based on two-stage time quantization

被引：0

作者：

Wang, Zixuan ^{[1
]}

Wu, Jianhui ^{[1
]}

Chen, Qing ^{[1
]}

Ji, Xincun ^{[1
]}

机构：

[1] Southeast Univ, Natl ASIC Syst Engn Res Ctr, Nanjing 210096, Jiangsu, Peoples R China

来源：

IEICE ELECTRONICS EXPRESS | 2013年 / 10卷 / 24期

关键词：

time-to-digital converter; MASH sigma-delta modulator; noise shaping; high resolution;

D O I：

10.1587/elex.10.20130729

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A MASH 1-1-1 Delta Sigma time-to-digital converter (TDC), based on two-stage time quantization, was designed with a 0.13 mu m CMOS process and a 1.2V supply. A classical delay line and a Vernier delay line were used for coarse and fine quantization, respectively. Third-order noise-shaping was achieved using the proposed MASH 1-1-1 Delta Sigma modulator. Simulation results showed that a resolution of up to 5.5 ps and a measurement range of 38.4 ns could be achieved. The proposed TDC consumes 4.9mW and occupies 0.28 mm(2).

引用

页数：7

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