A 2.88mm2 50M-Intersections/s Ray-Triangle Intersection Unit for Interactive Ray Tracing

被引：0

作者：

Chang, Chen-Haur ^{[1
]}

Lee, Chuan-Yiu ^{[1
]}

Chien, Shao-Yi ^{[1
]}

机构：

[1] Natl Taiwan Univ, Grad Inst Elect Engn, Media IC & Syst Lab, Dept Elect Engn, BL-421,1 Sec 4,Roosevelt Rd, Taipei 106, Taiwan

来源：

2008 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE | 2008年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A ray-triangle intersection unit design for ray-tracing in embedded systems is fabricated by TSMC 0.13 mu m technology. Bounding volume hierarchy data structure is employed to reduce the on-chip memory requirement. Multi-threading technique is used in the traversal unit to improve the hardware utilization and performance. Moreover, the cost of intersection unit is optimized with folding technique and reconfigurable datapath. Furthermore, the memory bandwidth is reduced with the proposed multi-bank cache architecture, It can provide the processing speed of 50M-intersections/s with only 2.88mm(2) in hardware cost

引用

页码：181 / +

页数：2

共 2 条

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Yoon, Yong Min
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