Copper-Pillar Bump-Joint Thermo-Mechanical and Thermal Modeling for Flip-Chip Packages

被引:0
|
作者
Mandal, Rathin [1 ]
Mui, Y. C. [1 ]
机构
[1] Adv Micro Devices Singapore Pte Ltd, Singapore, Singapore
关键词
D O I
10.1109/EPTC.2008.4763590
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Thermo-mechanical modeling has been done in a true-symmetry three-dimensional geometry for copper-pillar flip-chip packages to find out package warpage, stress and bump joint strain energy during temperature cycling. Lead-free solder materials, SnAg and SnAgCu were used in the bump joint at the substrate side. The strain energy due to both time-independent plastic and creep had been considered during temperature cycling. Ansys FEA modeling was done in two steps. First, a true-symmetry global model was generated. Then, cut boundary sub-modeling technique was applied to find out the stress and strain energy in different critical locations. Different underfill materials revealed that lower coefficient of thermal expansion (CTE) and lower modulus material has low stress in the underfill but strain energy accumulation in the bump during temperature cycling was greater. Bump strain energy accumulation due to bump pitch was also studied and revealed that strain energy accumulation was higher for increasing bump pitch from 150 mu m to 180 mu m. Simulation has been done to find the effect of copper pillar height with different underfill and revealed that bump strain energy accumulation varies with the underfill properties. A thermal model was also generated in Flothern to find the effect of copper pillar thermal performance on flip-chip packages. Copper pillar flip chip packages didn't show any significant thermal benefit, since most of the heat removal was happening from silicon back side.
引用
收藏
页码:1184 / 1189
页数:6
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