Room-temperature demonstration of highly-functional single-hole transistor logic based on quantum mechanical effect

被引:11
|
作者
Saitoh, M [1 ]
Hiramoto, T [1 ]
机构
[1] Univ Tokyo, Inst Ind Sci, Meguro Ku, Tokyo 1538505, Japan
关键词
D O I
10.1049/el:20040554
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Novel highly-functional single-hole transistor (SHT) logic is proposed. An SHT is fabricated which shows Coulomb blockade and negative differential conductance (NDC) due to discrete quantum levels in the ultra-small dot at room temperature. By utilising gate-controllable NDC, exclusive-OR operation is successfully demonstrated in just one SHT at room temperature.
引用
收藏
页码:836 / 837
页数:2
相关论文
共 50 条
  • [1] Room-temperature operation of highly functional single-electron transistor logic based on quantum mechanical effect in ultra-small silicon dot
    Saitoh, M
    Hiramoto, T
    2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, 2003, : 753 - 756
  • [2] Extension of Coulomb blockade region by quantum confinement in the ultrasmall silicon dot in a single-hole transistor at room temperature
    Saitoh, M
    Hiramoto, T
    APPLIED PHYSICS LETTERS, 2004, 84 (16) : 3172 - 3174
  • [3] Room-temperature transient carrier transport in germanium single-hole/electron transistors
    Liao, WM
    Li, PW
    Kuo, DMT
    Lai, WT
    APPLIED PHYSICS LETTERS, 2006, 88 (18)
  • [4] Uniaxial Strain Effects on Silicon Nanowire pMOSFET and Single-Hole Transistor at Room Temperature
    Jeong, YeonJoo
    Chen, Jiezhi
    Saraya, Takuya
    Hiramoto, Toshiro
    IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2008, TECHNICAL DIGEST, 2008, : 761 - 764
  • [5] Room-temperature operation of multifunctional single-electron transistor logic
    Uchida, K
    Koga, J
    Ohba, R
    Toriumi, A
    INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, : 863 - 865
  • [6] Modeling and Analysis of Room-Temperature Silicon Quantum Dot-Based Single-Electron Transistor Logic Gates
    Miralaie, M.
    Leilaeioun, M.
    Abbasian, K.
    Hasani, M.
    JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, 2014, 11 (01) : 15 - 24
  • [7] Room-temperature transistor based on a single carbon nanotube
    Sander J. Tans
    Alwin R. M. Verschueren
    Cees Dekker
    Nature, 1998, 393 : 49 - 52
  • [8] Room-temperature transistor based on a single carbon nanotube
    Tans, SJ
    Verschueren, ARM
    Dekker, C
    NATURE, 1998, 393 (6680) : 49 - 52
  • [9] Tunneling barrier structures in room-temperature operating silicon single-electron and single-hole transistors
    Saitoh, M
    Majima, H
    Hiramoto, T
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2003, 42 (4B): : 2426 - 2428
  • [10] Tunneling barrier structures in room-temperature operating silicon single-electron and single-hole transistors
    Saitoh, Masumi
    Majima, Hideaki
    Hiramoto, Toshiro
    Saitoh, M. (masumi@nano.iis.u-tokyo.ac.jp), 1600, Japan Society of Applied Physics (42): : 2426 - 2428